A capacitive voltage divider for measuring microsecond pulse width square wave signals

Author： GOZ Electric Time：2024-07-13 09:34:40 Read：12

In order to solve the problem of flat-top fading when measuring square wave signals with pulse widths of μs, an improved two-terminal matching capacitor voltage divider was designed. The two-terminal matching capacitor voltage divider was simulated in the frequency domain and time domain. The simulation results show that the amplitude-frequency characteristics of the two-terminal matching method are not flat in the mid-frequency band, and the square wave response waveform also has overshoot. The starting resistance and the corresponding end capacitance were adjusted through simulation calculation to achieve the optimal design of the two-terminal matching method. The experimental results show that when the low-voltage arm capacitance is 2 nF, the improved two-terminal matching capacitor voltage divider with a cable of 50 ns electrical length can obtain a waveform with an overshoot of less than 2% and no flat-top fading.

Capacitor voltage divider is a commonly used measurement method for pulsed high voltage. For fast pulse measurement, the capacitor voltage dividers commonly used at present are self-integrating or differential types, with excellent high-frequency characteristics, but insufficient low-frequency response. The shortcomings of the self-integrating low-frequency response are usually expanded by setting compensation resistors or compensation capacitors, but the distributed parameters make it difficult for the compensation method to meet the measurement requirements of μs-level square wave signals. The differential capacitive voltage divider (D-dot) has no low frequency lower limit, but if hardware (passive integrator) integration is used, a very large time constant is required to meet the requirements of low frequency response, resulting in the signal being too low to be measured. If numerical integration is used, there are specific problems for measuring square wave signals. That is, since the dV/dt amplitude of the rising and falling edges of the square wave signal is large, and the dV/dt of the flat-top part is close to 0, in order to ensure that the differential signal corresponding to the front and rear edges of the square wave measured by the digital oscilloscope does not exceed the screen, the signal-to-noise ratio of the flat-top part signal is very poor, and slight interference can easily cause the flat-top part of the voltage waveform to be distorted, affecting the measurement results. In addition, numerical integration also has problems such as inconvenience caused by baseline offset. In order to meet the measurement of lower frequency signals, the self-integrating capacitive voltage divider has developed a two-terminal matching method, but it is necessary to deal with the problem of the equivalent capacitance of the signal cable changing the voltage divider ratio. The traditional analysis method discusses the response capability of the voltage divider by comparing the steady-state voltage divider ratio with the transient voltage divider ratio, and lacks analysis for the full frequency band. This paper discusses the influence of the measurement cable on the measurement results of the voltage divider through frequency domain simulation analysis, improves the double-end matching method, and obtains the measurement results without flat-top fading and small overshoot.

Theoretical analysis and improved design of double-end matching capacitor voltage divider

The double-end matching capacitor voltage divider is realized by setting the end matching resistor R2 and the series capacitor C3. As shown in the principle, the equivalent electrical length of the cable T1 is T, and the equivalent capacitance is Cc. When C1+ C2=Cc+C3 is satisfied, the steady-state voltage divider ratio is calculated to be equal to the transient voltage divider ratio. However, the equality of the steady-state voltage divider ratio and the transient voltage divider ratio does not mean that the voltage divider meets the requirements in the full frequency band. In addition, the condition C1+ C2=Cc+C3 indicates that when C1 and C2 are determined, Cc+C3 is a certain value. That is, this condition can choose a longer cable (larger Cc) with a smaller C3, or a shorter cable with a larger C3. Through the following frequency domain and time domain simulations, the influence of different choices on the frequency characteristics of the double-end matching capacitor voltage divider is analyzed. When the value of the electrical length of the cable is as shown in Table 1, the frequency characteristics of the voltage divider output obtained by simulation are shown in Figure 2. The amplitude-frequency characteristics show that although the steady-state voltage divider ratio is equal to the transient voltage divider ratio, there is unevenness in the mid-frequency band. For example, the outputs of parameters 1 to 3 in the low frequency band (below 500 kHz) and the high frequency band (above 50 MHz) are basically equal (assuming the attenuation coefficient is β1), but the outputs in the mid-frequency band are obviously different (assuming the attenuation coefficient at the maximum gain position is β2). Parameter 2 has β1=−66 dB, and there is a maximum gain at a frequency of about 38 MHz, corresponding to β2=−64.5 dB, then the maximum gain Δβ=β2−β1=1.5 dB; parameter 1 corresponds to Δβ≈0.3 dB; parameter 3 corresponds to Δβ≈5.3 dB. For parameter 4, since the cable Cc≈2 nF, no matter how C3 is set, it is impossible to compensate for the high-frequency characteristics of the voltage divider (this parameter is actually equivalent to the start-end matching method). As shown in Figure 2, the shorter cable has a flatter frequency characteristic. And by comparison, it can be seen that: although the double-ended matching can improve the unevenness of the intermediate frequency band output, if 10% is defined as the deviation (i.e. 0.83 dB), only T=25 ns is available. The square wave response results of the double-ended matching capacitor voltage divider are shown in Figure 3. The above-mentioned unevenness of the intermediate frequency band is manifested in the square wave response waveform as overshoot and ringing. Set the square wave amplitude to 2 kV, and the square wave flat-top amplitude V=1 V output by the voltage divider. As shown in Figure 3, the square wave overshoot corresponding to the peak values Vpek of parameters 1 to 4 are 1.03 V, 1.13 V, 1.40 V, and 1.90 V, respectively. Therefore, in practical applications, the double-ended matching voltage divider still has a large limitation on the cable length. In Figure 3, the overshoot δ≈3% of parameter 1 (T=25 ns, corresponding to a polyethylene cable length of 5 m), the output waveform distortion is small, and can basically meet the measurement needs; while the overshoot of the capacitor voltage divider of other parameters exceeds 10%, and the output waveform has obvious distortion.

In order to improve the intermediate frequency band of the double-ended matching voltage divider and achieve the purpose of appropriately increasing the length of the test cable (for example, due to the limitations of the test site conditions, the test cable needs a certain length), the circuit was improved. Qualitative analysis shows that: when the frequency is higher than a certain value, the capacitive reactance of the capacitor C is extremely small, and it can be equivalent to a short circuit compared with the cable wave impedance Z. Therefore, when R2=Z, the cable end can maintain impedance matching. Therefore, it is not necessary to make R1 equal to the cable wave impedance Z.